Liquid crystal display device having a low-voltage driving circuit

ABSTRACT

A liquid crystal display device has a liquid crystal composition sandwiched between a pair of substrates, and a plurality of pixels disposed on one of the first substrates. Each of the pixels is supplied with a video signal via a switching element connected to a first electrode thereof, and is provided with a capacitance. One of two capacitance-forming electrodes forming the capacitance is connected to the first electrode of a corresponding one of the pixels, and another of the two capacitance-forming electrodes is supplied with a pixel-potential control signal. Polarity of the video signal reverses with respect to a first reference voltage with a repetition period, and the pixel-potential control signal alternates between two voltage levels of same polarity with respect to a second reference voltage such that a voltage swing on the first electrodes of the pixels becomes larger than that of the video signal.

BACKGROUND OF THE INVENTION

[0001] This invention relates a liquid crystal display device, and moreparticularly to a technique useful for a circuit for supplying a videosignal voltage to each pixel.

[0002] Recently, liquid crystal display devices have been widely used insmall-sized display devices, display terminals for office automationequipment and the like. Basically, a liquid crystal display deviceincludes a liquid crystal display panel (also called a liquid crystaldisplay element or a liquid crystal cell) composed of a pair ofinsulating substrates at least one of which is made of a transparentplate, a transparent plastic plate or the like, and a layer of liquidcrystal composition (a liquid crystal layer) sandwiched between theinsulating substrates.

[0003] The liquid crystal display devices are divided roughly into thesimple-matrix type and the active matrix type. In the simple-matrix typeliquid crystal display device, a picture element (hereinafter a pixel)is formed by selectively applying voltages to pixel-forming stripelectrodes formed on both of the two insulating substrates of the liquidcrystal display panel, and thereby changing orientation of a portion ofliquid crystal molecules of the liquid crystal composition correspondingto the pixel. On the other hand, in the active-matrix type liquidcrystal display device, the liquid crystal display panel is providedwith signal lines, scanning lines, pixel electrodes, and active elementseach associated with one of the pixel electrodes for pixel selectionwhich are formed on one of the substrates, and a pixel is formed byselecting the active element associated with the pixel and therebychanging orientation of liquid crystal molecules present between a pixelelectrode connected to the active element and the reference voltageelectrode associated with the pixel electrode.

[0004] The liquid crystal display device of the active matrix typehaving an active element (a thin film transistor, for example) for eachof pixels and switching the active elements is widely used as a displaydevice for notebook personal computers and the like. Among the liquidcrystal display devices of the active matrix type, a liquid crystaldisplay device of the so-called driver-circuit-integrated type is knownwhich has a pixel-electrode-driver circuit fabricated on a substrate onwhich the pixel electrodes are fabricated. The liquid crystal displaydevices are operated by AC driving which inverts the polarity of avoltage applied across the liquid crystal layer periodically. The objectof the AC driving is to prevent deterioration of the liquid crystalcomposition caused by DC voltage application across the liquid crystallayer.

[0005] For the active matrix type liquid crystal display device whichapplies voltages between the pixel electrodes and the referenceelectrode, one of the AC driving methods is such that a fixed voltage isapplied on the reference electrode and the pixel electrodes are suppliedalternately with positive-polarity and negative-polarity signalvoltages. However, in the above AC driving method, the driver circuitneeds to be a high-voltage circuit capable of withstanding a voltagedifference between the maximum positive value and the maximum negativevalue of the pixel electrode voltage. A control signal (a scanningsignal) for on-or-off control of the thin film transistors also need tobe a high voltage.

[0006] Recently, the number of steps of a gray scale displayed in theliquid crystal display devices has been increasing to 64 or 256. Thereis also demand for high-definition liquid crystal display devices havinga larger number of pixels. When the number of steps of a gray scale tobe displayed, the circuit becomes large in scale, and when the number ofpixels is increased, the driving circuit for supplying signals to therespective pixels is operated at high speed, and an area which each ofthe pixels can occupy is reduced. On the other hand, in high-voltagecircuits it is difficult to miniaturize their circuit elements, and as aresult the scale of the circuits becomes larger. Especially insmall-sized liquid crystal display panels, even when there is a demandfor an increase in the number of pixels, it has been difficult tofabricate a structure such as a high-voltage active element within alimited area of each pixel. Further, in a liquid crystal display deviceof the driver-circuit-integrated type having a driver circuitincorporated into its liquid crystal display panel, a problem arises inthat since the area occupied by the driver circuit increases, the liquidcrystal display panel becomes large-sized. Moreover, in the high-voltagecircuit, there is a problem in that, because the area of its electrodesand others are increased, the resultant increase in their capacitivecomponents makes it difficult to operate the driver circuit at highspeed, and also increases its power consumption.

SUMMARY OF THE INVENTION

[0007] The present invention has been made to solve the above problemswith the prior art, and provides a technique capable of high-speedoperation of the liquid crystal display device by making possible the ACdriving with a low-voltage drive circuit and reduction of the size ofpixels and the scale of the drive circuit.

[0008] The above-mentioned objects and novel features of the presentinvention will become apparent with reference to the description of thespecification and the accompanying drawings.

[0009] The following explains the representative ones of the presentinventions briefly.

[0010] In accordance with an embodiment of the present invention, thereis provided a liquid crystal display comprising a first substrate, asecond substrate, a liquid crystal composition sandwiched between thefirst substrate and the second substrate, a plurality of pixels disposedon the first substrate, each of the plurality of pixels being suppliedwith a video signal via a switching element connected to a firstelectrode thereof, each of the plurality of pixels being provided with acapacitance, one of two capacitance-forming electrodes forming thecapacitance being connected to the first electrode of a correspondingone of the plurality of pixels, and another of the twocapacitance-forming electrodes being supplied with a pixel-potentialcontrol signal, wherein polarity of the video signal reverses withrespect to a first reference voltage with a repetition period, and thepixel-potential control signal alternates between two voltage levels ofsame polarity with respect to a second reference voltage such that avoltage swing on the first electrodes of the plurality of pixels becomeslarger than that of the video signal.

[0011] In accordance with another embodiment of the present invention,there is provided a liquid crystal display device comprising a firstsubstrate, a second substrate, a liquid crystal composition sandwichedbetween the first substrate and the second substrate, a plurality ofpixels disposed on the first substrate, each of the plurality of pixelsbeing supplied with a video signal via a switching element connected toa first electrode thereof, each of the plurality of pixels beingprovided with a capacitance, one of two capacitance-forming electrodesforming the capacitance being connected to the first electrode of acorresponding one of the plurality of pixels, another of the twocapacitance-forming electrodes being supplied with a pixel-potentialcontrol signal, and light-blocking films interposed between electrodesforming the plurality of pixels on the first substrate, wherein polarityof the video signal reverses with respect to a first reference voltagewith a repetition period, the pixel-potential control signal alternatesbetween two voltage levels of same polarity with respect to a secondreference voltage such that a voltage swing on the first electrodes ofthe plurality of pixels becomes larger than that of the video signal,and the pixel-potential control signal is provided via a correspondingone of the light-blocking films.

[0012] In accordance with another embodiment of the present invention,there is provided a liquid crystal display device comprising a firstsubstrate, a second substrate, a liquid crystal composition sandwichedbetween the first substrate and the second substrate, a plurality ofpixels disposed on the first substrate, each of the plurality of pixelsbeing supplied with a video signal via a switching element connected toa pixel electrode thereof, each of the plurality of pixels having apixel capacitance and a liquid crystal capacitance, one of twopixel-capacitance-forming electrodes forming the pixel capacitance beingconnected to the pixel electrode of a corresponding one of the pluralityof pixels, another of the two pixel-capacitance-forming electrodes beingsupplied with a pixel-potential control signal, one of twoliquid-crystal-capacitance-forming electrodes forming the liquid crystalcapacitance being the pixel electrode of the corresponding one of theplurality of pixels, and another of the twoliquid-crystal-capacitance-forming electrodes being supplied with afirst reference voltage, wherein the video signal swings between twovoltage levels of same polarity with respect to a second referencevoltage, and the pixel-potential control signal changes from a firstvoltage level to a second voltage level such that a voltage on the pixelelectrode is reversed in polarity with respect to the first referencevoltage.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In the accompanying drawings, in which like reference numeralsdesignate similar components throughout the figures, and in which:

[0014]FIG. 1 is a block diagram for illustrating a rough overallstructure of a liquid crystal display device in accordance with anembodiment of the present invention;

[0015]FIG. 2 is a block diagram illustrating an example of a liquidcrystal panel in accordance with an embodiment of the present invention;

[0016]FIGS. 3A and 3B are schematic circuit diagrams for explaining amethod of controlling a pixel potential;

[0017]FIG. 4 is a timing chart for explaining the method of driving theliquid crystal display panel shown in FIG. 2;

[0018]FIG. 5 is a schematic circuit diagram for illustrating apixel-potential control circuit;

[0019] FIGS. 6A-6D are schematic circuit diagrams for illustratingclocked inverters employed in the pixel-potential control circuit;

[0020]FIG. 7 is a schematic cross-sectional view of a pixel section in aliquid crystal display device in accordance with an embodiment of thepresent invention;

[0021]FIG. 8 is a schematic plan view of a configuration ofpixel-potential control lines formed by using light-blocking films;

[0022]FIGS. 9A and 9B are timing charts illustrating a method of drivinga liquid crystal display device in accordance with an embodiment of thepresent invention;

[0023]FIG. 10A is a cross-sectional view of an inverter circuitconstituting an output circuit in the liquid crystal display device inaccordance with an embodiment of the present invention, and FIG. 10Billustrates timing charts for explaining operation of the liquid crystaldisplay device in accordance with an embodiment of the presentinvention;

[0024]FIG. 11 is a schematic plan view of a liquid crystal displaydevice in accordance with an embodiment of the present invention;

[0025]FIG. 12 is a timing chart for illustrating a method of driving aliquid crystal display device in accordance with an embodiment of thepresent invention;

[0026]FIGS. 13A and 13B are perspective views of a liquid crystaldisplay device in accordance with an embodiment of the present inventionfor explaining its operation;

[0027]FIG. 14 is a schematic plan view of a liquid crystal display panelin accordance with an embodiment of the present invention;

[0028]FIG. 15 is a schematic plan view of a liquid crystal displaydevice in accordance with an embodiment of the present invention;

[0029]FIG. 16 is a schematic cross-sectional view of an active elementand its vicinity for explaining a liquid crystal display device inaccordance with an embodiment of the present invention;

[0030]FIG. 17 is a schematic cross-sectional view of an active elementand its vicinity for explaining a liquid crystal display device inaccordance with an embodiment of the present invention;

[0031]FIG. 18 is a schematic perspective view of a liquid crystaldisplay panel of a liquid crystal display device in accordance with anembodiment of the present invention;

[0032]FIG. 19 is a schematic plan view for explaining the condition of aflexible printed circuit board connected to a liquid crystal panel of aliquid crystal display panel of a liquid crystal display device inaccordance with an embodiment of the present invention;

[0033]FIG. 20 is an exploded perspective view of a liquid crystaldisplay device in accordance with an embodiment of the presentinvention; and

[0034]FIG. 21 is a schematic plan view of a liquid crystal panel of aliquid crystal display panel of a liquid crystal display device inaccordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0035] The following describes the embodiments in accordance with thepresent invention in detail by reference to the drawings. Same referencenumerals designate functionally similar parts throughout the figures forexplaining the embodiments of the present invention, and they are notrepeatedly explained.

[0036]FIG. 1 is a block diagram for illustrating a rough overallstructure of a liquid crystal display device in accordance with anembodiment of the present invention. The liquid crystal display deviceof the present embodiment comprises a liquid crystal display panel (aliquid crystal display element) 100 and a display control device 111.

[0037] The liquid crystal display panel 100 comprises a display section110 having pixel sections 101 arranged in a matrix fashion, a horizontaldrive circuit (a video signal line drive circuit) 120, a vertical drivecircuit (a scanning signal line drive circuit) 130, and apixel-potential control circuit 135. The display section 110, thehorizontal drive circuit 120, the vertical drive circuit 130, and thepixel-potential control circuit 135 are disposed on the same substrate.

[0038] The display control device 111 controls the horizontal drivecircuit 120, the vertical drive circuit 130, and the pixel-potentialcontrol circuit 135, based upon control signals such as clock signals, adisplay timing signal, a horizontal sync signal, a vertical sync signal,which are externally transmitted. The display control device 111supplies display data to be displayed on the liquid crystal displaypanel 100, to the horizontal drive circuit 120. Reference numeral 131denote control signal lines from the display control device 111, and 132is a display signal line.

[0039] A plurality of video signal lines (also called drain signal linesor vertical signal lines) 103 extend from the horizontal drive circuit120 in a vertical direction (in the Y direction in FIG. 1) into thedisplay section 110, and they are arranged in a horizontal direction (inthe X direction in FIG. 1). A plurality of scanning signal lines (alsocalled gate signal lines or horizontal signal lines) 102 extend from thevertical drive circuit 130 in the horizontal direction (in the Xdirection in FIG. 1), and they are arranged in the vertical direction(in the Y direction in FIG. 1). A plurality of pixel-potential controlline 136 extend from the pixel-potential control circuit 135 in thehorizontal direction (in the X direction), and are arranged in thevertical direction (in the Y direction).

[0040] The horizontal drive circuit 120 comprises a horizontal shiftregister 121 and a voltage selector circuit 123. The control signallines 131 and the display signal line 132 from the display controldevice 111 is connected to the horizontal shift register 121 and avoltage selector circuit 123 for supplying control signals and displaysignals. Here display data in both digital and analog forms.

[0041] For simplicity, voltage supply lines to the respective circuitsare omitted from FIG. 1, but it is to be understood that necessarysupply voltages are provided to the respective circuits.

[0042] When the display control device 111 receives the first displaytiming signal immediately after receiving an externally suppliedvertical sync signal, the display control device 111 outputs a startpulse to the vertical drive circuit 130 via the control signal line 131.Then the display control device 111 outputs shift clocks to the verticaldrive circuit 130 with a horizontal scanning period (hereinafterreferred to as 1 h) based upon the horizontal sync pulses so that thescanning signal lines 102 are selected sequentially. The vertical drivecircuit 130 selects the scanning signal lines 102 based upon the shiftclocks and supplies the scanning signals to the selected scanning signallines 102. That is to say, the vertical drive circuit 130 outputssignals to select the scanning signal lines 102 for one horizontalscanning period 1 h, line by line, from top to bottom, in FIG. 1.

[0043] Further, when the display control device 111 receives a displaytiming signal, the display control device 111 acknowledges the displaytiming signal as corresponding to a display start, and outputs displaydata to the horizontal drive circuit 120. Display data are outputsequentially from the display control device 111, and the horizontalshift register 121 outputs timing signals based upon the shift clockstransmitted from the display control device 111. The timing signalsindicate times at which the voltage selector circuit 123 takes indisplay data to be supplied to the respective video signal lines 103.

[0044] When display signals are in analog form, the voltage selectorcircuit 123 takes in corresponding levels as display data (gray scalevoltages) from the analog signals in synchronism with the timingsignals, and then outputs the taken-in gray scale voltages to the videosignal lines 103 as video signals. On the other hand, when display dataare in digital form, the voltage selector circuit 123 takes in thedisplay signals in synchronism with the timing signals, and then selects(decodes) gray scale voltages in accordance with the display signals(the digital data), and then outputs the gray scale voltages to thevideo signal lines 103. The gray scale voltages output to the videosignal lines 103 are written into the pixel electrodes of the pixelsections 101 as the video signals in synchronism with the scanningsignals from the vertical drive circuit 130.

[0045] The pixel-potential control circuit 135 controls the video signalvoltages written into the pixel electrodes in accordance with thecontrol signals from the display control device 111. The gray scalevoltages written into the pixel electrodes via the video signal lines103 have some voltage difference with respect to the reference voltageon the counter electrode. The pixel-potential control circuit 135 variesthe voltage difference between the pixel electrodes and the counterelectrode by supplying a control signal to the pixel selections 101. Thedetail of the pixel-potential control circuit 135 will be explainedsubsequently.

[0046] The pixel section 101 in the liquid crystal display panel 100 inan embodiment of the present invention will be explained by reference toFIG. 2. FIG. 2 illustrates an equivalent circuit of the pixel section101. Each of the pixels 101 is disposed in an area surrounded by twoadjacent ones of the scanning signal lines 102 and two adjacent ones ofthe video signal lines 103 in the display section 110, and the pixels101 are arranged in a matrix fashion. For simplicity, only one of thepixel sections 101 is depicted in FIG. 2. Each of the pixel sections 101has an active element 30 and a pixel electrode 109. The pixel electrode109 is connected to a pixel capacitance 115. One electrode of the pixelcapacitance 115 is connected to the pixel electrode 109, and the otherelectrode of the pixel capacitance 115 is connected to thepixel-potential control line 136 which in turn is connected to thepixel-potential control circuit 135. In FIG. 2, the active element 30 isillustrated as the p-channel type transistor.

[0047] As described above, the vertical drive circuit 130 outputs thescanning signals sequentially to the scanning signal lines 102, and thescanning signals are used for on-or-off control of the active elements30. The video signal lines 103 are supplied with the gray-scale voltagesas the video signals, and when the active elements 30 are turned on, thegray-scale voltages are supplied to the pixel electrodes 109 from thevideo signal lines 103. A counter electrode (a common electrode) 107 isdisposed to face the pixel electrodes 109, and a liquid crystal layer(not shown) is interposed between the pixel electrodes 109 and thecounter electrode 107. In the circuit diagram shown in FIG. 2, anequivalent liquid crystal capacitance 108 due to the liquid crystallayer is illustrated as connected between one of the pixel electrode 109and the counter electrode 107. A display is produced by applyingvoltages between the pixel electrodes 109 and the counter electrode 107,thereby changing the direction of orientation of liquid crystalmolecules and by utilizing resultant changes in optical properties ofthe liquid crystal layer.

[0048] For a method of driving the liquid crystal display device, asdescribed above, the AC driving is employed so as to avoid applicationof a DC voltage across the liquid crystal layer. For the AC driving, ifa voltage on the counter electrode 107 is taken as a reference voltage,the voltage selector circuit 123 outputs two voltages of positive andnegative polarities with respect to the reference voltage, as gray scalevoltages. However, if the voltage selector circuit 123 is configured tobe high-voltage circuit capable of withstanding a voltage differencebetween the two voltages of the positive and negative polarities,problems arise in that the scale of circuit elements such as the activeelements 30 becomes larger and the speed of operation is decreased.

[0049] In view of the above problems, an AC driving was studied which iscapable of utilizing signals of the same polarity with respect to thereference voltage, as video voltages to be supplied to the pixelelectrodes 109 from the voltage selector circuit 123.

[0050] As an example, suppose that the voltage selector circuit 123outputs a voltage of positive polarity with the reference voltage.Initially the voltage of the positive polarity with respect to thereference voltage is written into the pixel electrode, and then bylowering a voltage of a pixel-potential control signal supplied to theelectrode of the pixel capacitance 115 by the pixel-potential controlcircuit 135, and thereby lowering the voltage of the pixel electrode109, the voltage of negative polarity with respect to the referencevoltage is obtained.

[0051] When the above driving method is employed, the voltage differencebetween the maximum and minimum values of the voltages to be supplied bythe voltage selector circuit 123 becomes smaller, and as a result thevoltage selector circuit 123 can be configured as a low-voltage circuit.

[0052] In the above example, initially the voltage of positive polarityis written into the pixel electrode 109, then the voltage of negativepolarity is produced by using the pixel-potential control circuit 135.However, this relationship can be reversed. Initially the voltage ofnegative polarity is written into the pixel electrode 109, then thevoltage of positive polarity can be produced by raising the voltage ofthe pixel-potential control signal from the pixel-potential controlcircuit 135.

[0053] A method of varying the voltage on the pixel electrode 109 willbe explained by reference to FIGS. 3A and 3B. In FIGS. 3A and 3B, forpurpose of illustration, the liquid crystal capacitance 108 and thepixel capacitance 115 are represented by a first capacitor 53 and asecond capacitor 54, respectively, and the active element 30 isrepresented by a switch 104. Reference numeral 56 denotes one electrodeof the pixel capacitance 115 connected to the pixel electrode 109, and57 is the other electrode of the pixel capacitance 115 connected to thepixel-potential control line 136. A junction point between the pixelelectrode 109 and the electrode 56 is indicated by a node 58. Forsimplicity, assuming that other parasitic capacitances can be neglected,the capacitances of the first capacitor 53 and the second capacitor 54are CL and CC, respectively.

[0054] Initially, as shown in FIG. 3A, the electrode 57 of the secondcapacitor 54 is externally supplied with a voltage V1. Thereafter, whenthe switch 104 is turned ON by a scanning signal, a voltage is suppliedto the pixel electrode 109 and the electrode 56 from the video signalline 103. Here, the voltage supplied to the node 58 is assumed to be V2.

[0055] Then, as shown in FIG. 3B, at a time the switch 104 is turnedOFF, the voltage applied to the electrode 57, the pixel-potentialcontrol signal, is lowered from the voltage V1 to a voltage V3. Sincethe total amount of electric charges stored in the first and secondcapacitors 53 and 54 remains unchanged, the voltage at the node 58changes to V2−{CC/(CL+CC)}×(V1−V3).

[0056] Here, if the capacitance CL of the first capacitor 53 issufficiently small compared with the capacitance CC of the secondcapacitor 54, i.e., when CL<<CC, then CC/(CL+CC)≈1, and thereby thevoltage at the node 58 becomes equal to V2−V1+V3. If V2=0 and V3=0, thevoltage at the node 58 becomes equal to (−V1).

[0057] By using the above-explained method, initially a voltage suppliedto the pixel electrode 109 from the video signal line 103 is selected tobe positive with respect to the reference voltage on the counterelectrode 107, and thereafter a negative-polarity signal can be producedby controlling a voltage applied on the electrode 57, i.e., thepixel-potential control signal. When the negative-polarity signal isproduced in this way, it is not necessary to supply negative-polaritysignals from the voltage selector circuit 123, and thereby theperipheral circuits can be formed by using low-voltage circuit elements.

[0058] Operating timing in the circuit shown in FIG. 2 will be explainedby reference to FIG. 4. “1V” in FIG. 4 indicates a vertical scanningperiod. Φ 1 denotes a gray scale voltage supplied to the video signalline 103, Φ 2 is a scanning signal supplied to the scanning signal line102, Φ 3 is a pixel-potential control signal (a voltage-dropping signal)supplied to the pixel-potential control signal line 136, and Φ 4 is apotential of the pixel electrode 109. The pixel-potential control signalΦ 3 swings between the voltages V3 and V1 as indicated in FIGS. 3A and3B.

[0059]FIG. 4 illustrates a case in which the gray scale voltage Φ 1 iscomposed of a positive-polarity-voltage-input signal Φ 1A and anegative-polarity-voltage-input signal Φ 1B. Thepositive-polarity-voltage-input signal Φ 1A is applied to a pixelelectrode, and is left as it is. On the other hand, thenegative-polarity-voltage-input signal Φ 1B is initially applied to thepixel electrode, and then is converted into a voltage of polaritynegative with respect to a reference voltage Vcom by using thepixel-potential control signal Φ 3. In this embodiment, a case isassumed in which both the positive-polarity-voltage-input signal Φ 1Aand the negative-polarity-voltage-input signal Φ 1B are positive withrespect to the reference voltage Vcom applied to the counter electrode107.

[0060] In FIG. 4, during time from t0 to t2, the gray scale voltage Φ 1is the positive-polarity-voltage-input signal Φ 1A. Initially, at thetime t0, the pixel-potential control circuit 135 outputs the voltage V1as the pixel-potential control signal Φ 3, then, at time t1 when thescanning signal Φ 2 changes to a low level corresponding to a selectedstate, the p-channel type transistor 30 indicated in FIG. 2 is turnedOFF, and thereby the positive-polarity-voltage-input signal Φ 1A on thevideo signal line 103 is written into the pixel electrode 109. Thesignal written into the pixel electrode 109 is represented by Φ 4 inFIG. 4. The voltage written into the pixel electrode 109 at the time t1is represented by V2A in FIG. 4. Next, when the scanning signal Φ 2changes to a high level corresponding to a non-selected state, thetransistor 30 is turned OFF, and thereby the pixel electrode 109 is cutoff from the video signal line 103 for supplying a voltage thereto. Theliquid crystal display device displays a gray scale level based upon thevoltage V2A written into the pixel electrode 109.

[0061] Time from t2 to t4 will be explained when the gray scale voltageis Φ 1 is the negative-polarity-voltage-input signal Φ 1B. At the timet2, the scanning signal Φ 2 is output, and thereby a voltage V2Brepresented in Φ 4 is written into the pixel electrode 109. Thereafter,the transistor 30 is turned OFF, and at time t3, after a time of 2 h(two horizontal scanning periods) from the time t2, the voltage suppliedto the pixel capacitance 115 (see FIG. 2) is dropped from V1 to V3 asrepresented in the pixel-potential control signal Φ 3 of FIG. 4. Whenthe pixel-potential control signal Φ 3 is changed from V1 to V3, sincethe pixel capacitance 115 serves as a coupling capacitance, thepotential of the pixel electrode 109 can be dropped by the amount basedupon the amplitude of the pixel-potential control signal Φ 3. Thus avoltage V2C of polarity negative with respect to the reference voltageVcom is produced within the pixel.

[0062] When the negative-polarity signal is produced by using theabove-described method, the peripheral circuits can be formed by usinglow-voltage circuit elements. The signals output from the voltageselector circuit 123 are small-amplitude positive signals, and thereforeit makes possible to fabricate the voltage selector circuit 123 aslow-voltage circuits. When the voltage selector circuit 123 can beoperated at low voltages, since other peripheral circuits such as thehorizontal shift register 120 and the display control device 111 arelow-voltage circuits, the whole circuit of the liquid crystal displaydevice can be fabricated as a low-voltage circuit.

[0063]FIG. 5 illustrates a circuit configuration of the pixel-potentialcontrol circuit 135. Reference characters SR1-SRn+1 (hereinafter thesuffixes will be omitted unless they should be distinguished from eachother) denote bidirectional shift registers which can shift a signalupward and downward. Each of the bidirectional shift registers SR iscomposed of clocked inverters 61, 62, 65 and 66. Reference numeral 67denote level shifters, and 69 are output circuits. The circuits such asthe bidirectional shift registers SR operate from a supply voltage VDD.The level shifters 67 convert the voltage level of the signals outputfrom the bidirectional shift registers SR. The level shifters 67 outputa signal having an amplitude between a supply voltage VBB which ishigher than the supply voltage VDD and a supply voltage VSS (a groundpotential). The output circuits 69 are supplied with a supply voltageVPP and the supply voltage VSS, and output the voltage VPP or VSS to thepixel-potential control line 136 in accordance with the signal from thelevel shifter 67. In the pixel-potential control signal Φ 3 explained inconnection with FIG. 4, the voltages V1 and V3 correspond to the supplyvoltage VPP and the supply voltage VSS, respectively. In FIG. 5, theoutput circuits 69 are represented as inverters composed of p-channeltype and n-channel type transistors. The supply voltage VPP supplied tothe p-channel type transistor and the supply voltage VSS supplied to then-channel transistor can be selected such that they can be output as thepixel-potential control signal Φ 3. However, since the silicon substratewithin which the p-channel type transistors are fabricated is suppliedwith a substrate voltage as explained subsequently, the supply voltageVPP needs to selected to be an appropriate value with respect to thesubstrate voltage. Reference numeral 26 is an input terminal for a startsignal for supplying the start signal serving as one of control signalsto the pixel-potential control circuit 135. The bidirectional shiftregisters SR1-SRn+1 shown in FIG. 5 output timing signals successivelyin synchronism with externally supplied clock signals after receivingthe start signal. The level shifter 67 outputs the voltage VSS or VBB inaccordance with the timing signals, and the output circuit 69 outputsthe voltage VPP or VSS to the pixel-potential control line 136 inaccordance with the output from the level shifter 67. Thepixel-potential control signal Φ 3 having desired timing relationshipcan be output from the pixel-potential control circuit 135 by supplyingthe start signal and the clock signals to the bidirectional shiftregisters SR to establish the timing relationship for thepixel-potential control signal Φ 3 shown in FIG. 4. Reference numeral 25denotes an input terminal for a reset signal.

[0064] The clocked inverters 61 and 62 employed in the bidirectionalshift registers SR will be explained by reference to FIGS. 6A and 6B.Reference characters UD1 and UD2 denote first and seconddirection-setting lines, respectively. The first direction-setting lineUD1 provides an H level for scanning in the bottom-to-top direction inFIG. 5, and the second direction-setting line UD2 provides an H levelfor scanning in the top-to-bottom direction in FIG. 5. For clarity,wiring is omitted in FIG. 5, but the first and second direction-settinglines UD1 and UD2 are connected to the clocked inverters 61 and 62constituting the bidirectional shift register SR.

[0065] The clocked inverter 61 is composed of p-type transistors 71, 72and n-type transistors 73, 74 as shown in FIG. 6A. The p-type transistor71 is connected to the second direction-setting line UD2, and the n-typetransistor 74 is connected to the first direction-setting line UD1. Whenthe first direction-setting line UD1 is at the H level and the seconddirection-setting line UD2 is at the L level, the clocked inverter 61serves as an inverter, but when the second direction-setting line UD2 isat the H level and the first direction-setting line UD1 is at the Llevel, the clocked inverter 61 serves as a high impedance.

[0066] On the other hand, in the clocked inverter 62, the p-typetransistor 71 is connected to the first direction-setting line UD1, andthe n-type transistor 74 is connected to the second direction-settingline UD2, as shown in FIG. 6B. When the second direction-setting lineUD2 is at the H level, the clocked inverter 62 serves as an inverter,and when the first direction-setting line UD1 is at the H level, theclocked inverter 62 serves a high impedance.

[0067]FIG. 6C illustrates a circuit configuration of the clockedinverter 65. When a clock signal line CLK1 is at the H level, and aclock signal line CLK2 is at the L level, the clocked inverter 65outputs an inverted input, and when the clock signal line CLK1 is at theL level, and the clock signal line CLK2 is at the H level, the clockedinverter 65 serves as a high impedance.

[0068]FIG. 6D illustrates a circuit configuration of the clockedinverter 66. When the clock signal line CLK2 is at the H level, and theclock signal line CLK1 is at the L level, the clocked inverter 66outputs an inverted input, and when the clock signal line CLK2 is at theL level, and the clock signal line CLK1 is at the H level, the clocked66 inverter serves as a high impedance. For clarity, connections of theclock signal lines CLK1, CLK2 are omitted in FIGS. 6A-6D, but the clocksignal lines CLK1 and CLK2 are connected to the clocked inverters 65 and66.

[0069] As explained above, when the bidirectional shift registers areformed of the clocked inverters 61, 62, 65 and 66, the bidirectionalshift registers SR can output the timing signals successively. If thepixel-potential control circuit 135 is formed by the bidirectional shiftregisters SR, the pixel-potential control signal Φ 3 for thebidirectional scanning can be obtained. Since the vertical drive circuit130 is also composed of similar bidirectional shift registers, theliquid crystal display device in accordance with the present inventionis capable of bidirectional scanning of top-to-bottom and bottom-to-topdirections. With this configuration, if an inverted image is desired tobe displayed, scanning is performed from the bottom to the top of thedisplay screen by reversing the scanning direction. When the verticaldrive circuit 130 is set to scan the display screen from bottom to top,the pixel-potential control circuit 135 is also set to correspond to thebottom-to-top scanning by changing setting of the first and seconddirection-setting lines UD1 and UD2. The horizontal shift register 121is also composed of similar bidirectional shift registers.

[0070] The following explains the pixel section in the reflective typeliquid crystal display device in accordance with the present inventionby reference to FIG. 7. FIG. 7 is a schematic cross-sectional view of anembodiment of the reflective type liquid crystal display device inaccordance with the present invention. In FIG. 7, reference numeral 100denotes a liquid crystal display panel, 1 is a first substrate servingas a drive circuit substrate, 2 is a second substrate serving as atransparent substrate, 3 is a liquid crystal composition, 4 are spacers.The spacers 4 establish a fixed cell gap d between the drive circuitsubstrate 1 and the transparent substrate 2 which sandwich the liquidcrystal composition 3. Reference numeral 5 denotes reflective electrodes(pixel electrodes) formed on the drive circuit substrate 1, 6 is acounter electrode for applying a voltage across the liquid crystalcomposition 3 in cooperation with the reflective electrode 5, 7 and 8are orientation films for orientating liquid crystal molecules of theliquid crystal composition 3 in specified directions, and 30 are activeelements for applying a gray scale voltage to the reflective electrodes5. Reference numeral 34 denote source regions of the active elements 30,35 are drain regions of the active elements 30, 36 are gate electrodesof the active elements 30, 38 are insulating films, 31 and 40 are firstand second electrodes for forming pixel capacitances with the insulatingfilm 38 therebetween, respectively. In FIG. 7, the first and secondelectrodes 31, 40 are illustrated as representative electrodes forforming the pixel capacitances, and if other conductive layerselectrically connected to the pixel electrodes and other conductivelayers connected to the pixel-potential control line faces each otherwith a dielectric layer therebetween, they can form the pixelcapacitance.

[0071] In FIG. 7, reference numeral 41 are first interlayer insulatingfilms, and 42 are first conductive films which connect the drain regions35 and the second electrodes 40 electrically, 43 are second interlayerinsulating films, 44 are first light blocking films, 45 are thirdinterlayer insulating films, 46 are second light blocking films.Through-holes 42CH are made in the second and third interlayerinsulating films 43, 45, and thereby the first conductive film 42 andthe second light-blocking film 46 are electrically connected together.Reference numeral 47 are fourth interlayer insulating films, and 48 aresecond conductive films forming reflective electrodes 5. The gray scalevoltage is transmitted to the reflective electrode 5 via the firstconductive film 42, the through-hole 42CH and the second light-blockingfilm 46 from the drain region 35 of the active element 30.

[0072] The liquid crystal display device in this embodiment is of thereflective type. A large amount of light (from a lamp, for example) isprojected into the liquid crystal display panel 100. The light-blockingfilms block light from entering a semiconductor layer of the drivecircuit substrate. In the reflective type liquid crystal display device,light projected into the liquid crystal display panel 100 enters fromthe transparent substrate 2 (at the top of FIG. 7), then passes throughthe liquid crystal composition 3, then is reflected back by thereflective electrode 5, then passes through the liquid crystalcomposition 3 and the transparent substrate 2 again, and then leaves theliquid crystal display panel 100. However, a portion of the lightprojected into the liquid crystal display panel 100 leaks toward thedrive circuit substrate 1 through gaps between adjacent ones of thereflective electrodes 5. The first and second light-blocking films 44and 46 are provided to prevent light from entering the active elements30. In this embodiment, the first and second light-blocking films 44 and46 are made of conductive films, the second light-blocking film 46 iselectrically connected to the reflective electrode 5, and the firstlight-blocking film 44 is supplied with the pixel-potential controlsignal so that the light-blocking films form a portion of the pixelcapacitance.

[0073] Incidentally, if the first light-blocking film 44 is suppliedwith the pixel-potential control signal, the first light-blocking film44 can serve as an electric shield layer between the secondlight-blocking films 46 supplied with the gray scale voltage, and thefirst conductive layer 42 forming the video signal lines 103 andconductive layers (coplanar with the gate electrodes 36) forming thescanning signal lines 102. This reduces parasitic capacitances betweenthe first conductive layers 42 and the gate electrodes 36, and thesecond light-blocking films 46 and the reflective electrodes 5. Asdescribed above, it is necessary to make the pixel capacitance CCsufficiently larger than the liquid crystal capacitance CL. If the firstlight-blocking film 44 is provided as an electric shield, sinceparasitic capacitance connected in parallel with the liquid crystalcapacitance LC is reduced, it is effective for obtaining the aboverelationship. Further, it is possible to reduce the amount of noiseintroduced from the signal lines.

[0074] In the liquid crystal display element of the reflective type,when the reflective electrode 5 is disposed on the surface of the drivecircuit substrate 1 on its liquid crystal composition 3 side, an opaquesubstrate such as a silicon substrate can be used as the drive circuitsubstrate 1. This structure has advantages that the active elements 30and wiring can be disposed below the reflective electrodes 5, therebythe area of the reflective electrodes 5 can be increased which formpixels, and consequently, the higher aperture ratio can be realized.Also this structure has an advantage of radiating heat generated bylight projected into the liquid crystal display panel 100 from the backsurface of the drive circuit substrate 1.

[0075] The following explains formation of a portion of the pixelcapacitance by using the light-blocking films. The first light-blockingfilm 44 and the second light-blocking film 46 faces each other with thethird interlayer insulating film 45 interposed therebetween, and forms aportion of the pixel capacitance. Reference numeral 49 denotes aconductive layer forming a portion of the pixel-potential control line136. The first electrode 31 and the first light-blocking film 44 areelectrically connected by the conductive layer 49. The conductive layer49 can be used to form wiring between the pixel-potential controlcircuit 135 and the pixel capacitance. However, in this embodiment, thefirst light-blocking film 44 was used for the wiring. FIG. 8 illustratesa configuration in which the first light-blocking film 44 is used as thepixel-potential control line 136.

[0076]FIG. 8 is a plan view illustrating the arrangement of the firstlight-blocking films 44. Reference numeral 46 denote the secondlight-blocking films represented by broken lines for the purpose ofindicating their arrangement, although they overlie the firstlight-blocking films 44. Reference numeral 42CH denote through-holeswhich connect the first conductive film 42 and the second light-blockingfilm 46. In FIG. 8, other elements are omitted to avoid complicating thefigure. The first light-blocking films 44 serve as the pixel-potentialcontrol lines 136, and therefore they are fabricated to extendcontinuously in the X direction in FIG. 8. The first light-blockingfilms 44 are fabricated to cover the entire display area so as to serveas the light-blocking films, and they extend in lines in the X direction(the direction parallel with that of the scanning signal lines 102, arearranged in the Y direction, and are connected to the pixel-potentialcontrol circuit 135 so that they serve as the pixel-potential controllines 136 also. The first light-blocking films 44 are disposed tooverlap the second light-blocking films 46 in areas as large as possibleso that they also serve as the electrodes of the pixel capacitances, andgaps between adjacent ones of the first light-blocking films 44 are madeas small as possible to reduce leakage of light.

[0077] When the gaps between the adjacent lines of the firstlight-blocking films 44 are made small as shown in FIG. 8, a portion ofone line of the first light-blocking films 44 underlies one row of thesecond light-blocking films 46 associated with a succeeding line of thefirst light-blocking films 44. As described above, the liquid crystaldisplay device in accordance with the present invention is capable ofscanning in two directions. When the pixel-potential control signal isutilized in the bidirectional scanning, there occurs two cases: one casewhere one line of the first light-blocking films 44 overlaps a row ofthe second light-blocking films 46 associated with the next line of thefirst light-blocking films 44, and the other case where theabove-mentioned overlapping does not occur.

[0078] In a case illustrated in FIG. 8, when the scanning is performedin a direction from the top to the bottom of the figure, a portion ofone line of the first light-blocking films 44 underlies one row of thesecond light-blocking films 46 associated with the next-to-be-scannedline immediately succeeding the one line of the first light-blockingfilms 44.

[0079] The following explains a problem and its solution with theoverlap between a portion of one line of the first light-blocking films44 and one row of the second light-blocking films 46 associated with thenext-to-be-scanned line of the first light-blocking films 44 byreference to FIGS. 9A and 9B.

[0080]FIG. 9A illustrates timing charts for explaining the problem. InFIG. 9A, Φ 2A is a scanning signal for a given line A, and will bedesignated as the scanning signal for the line A, and Φ 2B is a scanningsignal for the next succeeding line B, and will be designated as thescanning signal for the line B. The following explains a period fromtime t2 to time t3 during which the problem arises, and the explanationof the remaining time will be omitted.

[0081] In FIG. 9A, in scanning the line A, at time t3, after a time of 2h (two horizontal scanning periods) from the time t2, a pixel-potentialcontrol signal Φ 3A is changed. After a time of 1 h from the time t2,the output of the scanning signal Φ 2A has ceased, the active elements30 driven by the scanning signal Φ 2A for the line A are turned OFF, andas a result the pixel electrodes 109 in the line A are cut off from thevideo signal lines 103. At the time t3, after a time of 2 h from thetime t2, the active elements 30 in the line A are in the sufficientlyOFF even when time delays as caused by switching of signals areconsidered. However, the time t3 is a time at which the scanning signalΦ 2B for the line B is changed.

[0082] Since the first light-blocking films 44 in the line A overlap thesecond light-blocking films 46 connected to the pixel electrodes 109 inthe line B, capacitances are formed between the pixel electrodes in theline B and the pixel-potential control line in the line A. Since thetime t3 is a time at which the active elements 30 in the line B changeto the OFF state, the pixel electrodes 109 in the line B are notsufficiently cut off from the video signal lines 103 at this time. Atthis time t3, if the pixel-potential control signal Φ 3A for the line A,which is capacitively coupled to the pixel electrodes 109 in the line B,is changed, electrical discharges are transferred between the videosignal lines 103 and the pixel electrodes 109 because they are notsufficiently cut off from each other. Consequently, the change of thepixel-potential control signal Φ 3A for the line A exerts an influenceupon a voltage Φ 4B written into the pixel electrodes 109 in the line B.Φ 3B in FIGS. 9A and 9B represents a pixel-potential control signal forthe line B.

[0083] The influence by the change of the pixel-potential control signalΦ 3A is not very conspicuous if a single liquid crystal display deviceis operated with its scanning direction being fixed, because theinfluence is uniform over the entire display area. However, when a colordisplay is produced by superposing three red, green and blue images fromthree separate liquid crystal display devices provided for the threered, green and blue primary colors, respectively, there is a case inwhich only one of the three liquid crystal display devices scans itsdisplay area from bottom to top, and the other two of the three liquidcrystal display devices scan their display areas from top to bottom, forexample, because of their optical arrangement. Like in this case, if thescanning directions differ among the plural liquid crystal displaydevices, quality of the display becomes non-uniform among the liquidcrystal display device, and the combined display is degraded.

[0084] A method of solving the above problem will be explained byreference to FIG. 9B. In this method, the pixel-potential control signalΦ 3A for the line A is output after a time delay of 3 h from thebeginning of the scanning signal Φ 2A for the line A. At this time, thescanning signal Φ 2B for the line B has ceased, therefore the activeelements 30 in the line B are in the sufficiently OFF state, andconsequently, this relationship reduces the influence exerted on thevoltage Φ 4B written into the pixel electrodes 109 in the line B by thepixel-potential control signal Φ 3A for the line A. In this case, thelength of the time for the negative-polarity-voltage-input signal to bewritten is made shorter by time as long as 3 h than that for thepositive-polarity-voltage-input signal, but the reduction in time isequal to or less than 3% when the number of the scanning signal lines102 exceeds 100, for example. Difference in root-mean-square valuebetween the negative-polarity-voltage-input andpositive-polarity-voltage-input signals can be adjusted by the referencevoltage Vcom or the like.

[0085] The relationship between the voltage VPP supplied to the pixelcapacitance and the substrate potential VBB will be explained byreference to FIGS. 10A and 10B. FIG. 10A is a cross-sectional view of aninverter circuit constituting the output circuit 69.

[0086] In FIG. 10A, reference numeral 32 denotes a channel region of ap-channel type transistor which is an n-type well fabricated as byimplanting ions into the silicon substrate 1. The silicon substrate 1 issupplied with the substrate voltage VBB, and the potential of the n-typewell 32 is VBB. The source region 34 and the drain region 35 are formedof p-type semiconductor layers fabricated as by implanting ions into thesubstrate 1. When the gate electrode 36 of the p-channel type transistor30 is supplied with a voltage lower than the substrate voltage VBB,there is formed a conducting layer between the source region 34 and thedrain region 35. Generally, since there is no need for providinginsulating sections, and therefore the structure is simplified, thetransistors fabricated on the same silicon substrate are supplied withthe common substrate potential VBB. In the liquid crystal display devicein accordance with the present invention, the transistors in the drivecircuit section and those in the pixel section are fabricated on thesame silicon substrate 1. The transistors in the pixel section are alsosupplied with the above-mentioned substrate potential VBB for theabove-explained reason.

[0087] In the inverter circuit shown in FIG. 10A, the source regions 34are supplied with the voltage VPP supplied to the pixel capacitance. Thesource regions 34 are formed of p-type semiconductor layers, and forms ap-n junction with the n-type well 32. When the potential of the sourceregion 34 is made higher than that of the n-type well 32, a problemarises in that a current flows from the source region 34 into the n-typewell 32. In view of this problem, the voltage VPP is selected to belower than the substrate voltage VBB.

[0088] As explained above, the voltage of the pixel electrode afterbeing dropped by the pixel-potential control signal is represented byV2−{CC/(CL+CC)}×(VPP−VSS), where V2 is a voltage written into the pixelelectrode, CL is a liquid crystal capacitance, CC is a pixelcapacitance, and (VPP−VSS) is an amplitude of the pixel-potentialcontrol signal. If the voltage VSS is selected to be ground potentialGND, the amount of variation in the pixel electrode voltage isdetermined by the voltage VPP, the liquid crystal capacitance CL and thepixel capacitance CC.

[0089]FIG. 10B illustrates a relationship between CC/(CL+CC) and thevoltage VPP. For simplicity, the reference voltage Vcom is taken to bethe ground potential GND. The following explains a case where, in theliquid crystal display device of the normally white type producing awhite image in the voltage-OFF state, a gray scale voltage is applied tothe pixel electrode so as to produce a black image (the lowest level ofthe gray scale). Φ 1 in FIG. 10B represents a gray scale voltage writteninto the pixel electrode from the voltage selector circuit 123. Φ 1A isa positive-polarity-voltage-input signal of the gray scale voltage Φ 1,and Φ 1B is a negative-polarity-voltage-input signal of the gray scalevoltage Φ 1. For formation of the black image, Φ 1A and Φ 1B areselected to maximize a difference between the reference voltage Vcom andthe gray scale voltage written into the pixel electrode.

[0090] In FIG. 10B, since Φ 1A is a positive-polarity-voltage-inputsignal for applying a positive-polarity voltage, as usual Φ 1A is takento be +Vmax so as to maximize its voltage difference with respect to thereference voltage Vcom. Φ 1B is taken to be Vcom (GND), and initially Φ1B is written into the pixel electrode and thereafter the potential ofthe pixel electrode is dropped by using the pixel capacitance.

[0091] Φ 4A and Φ 4B of FIG. 10B indicate voltages of the pixelelectrode for an ideal case where CC/(CL+CC)=1, and an unideal casewhere CC/(CL+CC)<1, respectively.

[0092] First the ideal case will be considered. In the period duringwhich the voltage Φ 4A on the pixel electrode is negative, sinceinitially the voltage Vcom (GND) is written into the pixel electrode asΦ 1B, the maximum negative voltage (−Vmax) obtained by lowering thepixel electrode potential by the amplitude VPP of the pixel-potentialcontrol signal Φ 3 becomes (−Vmax)=−VPP because of the relationship ofCC/(CL+CC)=1.

[0093] Next the unideal case will be considered. For the period duringwhich the voltage Φ 4B on the pixel electrode is negative, the amplitudeVPP2 of the pixel-potential control signal Φ 3 needs to be selected tosatisfy the relationship +Vmax<VPP2 because CC/(CL+CC). As describedabove, the relationship VPP<the substrate potential VBB, andconsequently, the relationship +Vmax<VPP<VBB needs to be satisfied.

[0094] In this embodiment, a method of lowering the pixel electrodevoltage having been written is employed to realize a low-voltagecircuit, but if the magnitude VPP of the pixel-potential control signalΦ 3 is excessively high, therefore the substrate voltage VBB becomes toohigh, and after all the circuit will be a high-voltage circuit. In viewof this, it is necessary to select the values of CL and CC so thatCC/(CL+CC) becomes as close to 1 as possible, in other words, CL<<CC issatisfied.

[0095] In the conventional liquid crystal display device of the typefabricating thin film transistors on a glass substrate, since it isnecessary to make the area of the pixel electrode as large as possible,i.e., to increase the aperture ratio, the realizable ratio of CC/CL isapproximately 1.0 at most. In the liquid crystal display device of thisembodiment, the drive circuit section and the pixel section arefabricated on the same silicon substrate, utilization of a high voltageas the substrate potential VBB makes it difficult to realize alow-voltage circuit.

[0096] Next an embodiment of a row-inversion driving method will beexplained by reference to FIGS. 11 and 12. The liquid crystal displaydevice 100 shown in FIG. 11 are provided with an odd-row pixel-potentialcontrol circuit 135(1) and an even-row the pixel-potential controlcircuit 135(2). In the row-inversion driving method, whenpositive-polarity gray scale voltages are written into the pixelelectrodes in the odd rows, for example, negative-polarity gray scalevoltages are written into the even rows for the purpose of ac driving.In the row-inversion driving method, voltage polarity is reversed everyother row, and therefore the waveform of the pixel-potential controlsignal needs to change every other row. Therefore, as shown in FIG. 11,the pixel-potential control circuit 135(1), 135(2) for the odd and evenrows, respectively, are provided for outputting two kinds of waveforms Φ3 a and Φ 3 b of the pixel-potential control signals alternately asshown in FIG.12 so as to perform the row-inversion driving.

[0097] Next, the reflective type liquid crystal display device will beexplained. As one of the reflective type liquid crystal display element,the electrically controlled birefringence mode is known. In theelectrically controlled birefringence mode, orientation of molecules ofthe liquid crystal composition is changed by applying a voltage betweenthe reflective electrode and the counter electrode sandwiching theliquid crystal composition to thereby change the birefringence of theliquid crystal layer. The electrically controlled birefringence modegenerates images by converting the changes of the birefringence into thechanges of light transmission.

[0098] Next, the single-polarizer twisted nematic (SPTN) mode, which isone type of the electrically controlled birefringence mode, will beexplained by reference to FIGS. 13A and 13B.

[0099] Reference numeral 9 denotes a polarizing beam splitter whichdivides an incident light L1 from a light source (not shown) into twopolarized lights, and a linearly polarized light L2 of the two isemitted.

[0100] In FIGS. 13A and 13B, a light having passed through thepolarizing beam splitter 9, which is a p-polarized light, is enteredinto the liquid crystal display panel 100, but instead a light reflectedby the polarizing beam splitter 9, which is an s-polarized light, can beentered into the liquid crystal display panel 100.

[0101] The liquid crystal composition 3 is a nematic liquid crystalmaterial having positive dielectric anisotropy. Longitudinal axes of theliquid crystal molecules are oriented approximately in parallel with themajor surfaces of the drive circuit substrate 1 and the transparentsubstrate 2, and the liquid crystal molecules are twisted through about90 degrees across the liquid crystal layer by the orientation films 7,8.

[0102]FIG. 13A illustrates a case where no voltage is applied across thelayer of the liquid crystal composition 3. The light L2 entering theliquid crystal display panel 100 is converted into ellipticallypolarized light by birefringence of the liquid crystal composition 3,and then becomes circularly polarized light on the reflective electrode5. The light reflected by the reflective electrode 5 passes through theliquid crystal composition 3 again, thereby becomes ellipticallypolarized light again, and then returns to linearly polarized lightagain when it leaves the liquid crystal display panel 100. The emergentlinearly polarized light L3 is s-polarized light having its direction ofpolarization rotated through an angle of 90° with respect to that of theincident light L2, enters the polarizing beam splitter 9 again, and thenis reflected by an internal interface of the polarizing beam splitter 9to become emergent light L4 which in turn is projected onto a screen orthe like to produce a display. This configuration is of the so-callednormally white (normally open) type which emits light when a voltage isnot applied across the layer of the liquid crystal composition 3.

[0103]FIG. 13B illustrates a case where a voltage is applied across thelayer of the liquid crystal composition 3. When an electric field isapplied across the layer of the liquid crystal composition 3, the liquidcrystal molecules align in a direction of the electric field andconsequently, the birefringence of the liquid crystal molecules does notappear. As a result, the linearly polarized light L2 entering the liquidcrystal display panel 100 is reflected by the reflective electrode 5without undergoing changes, and then the light L5 emergent from theliquid crystal display panel 100 has the same direction of polarizationas that of the incident light L2. The emergent light L5 passes throughthe polarizing beam splitter 9, and returns to the light source suchthat no light is projected onto the screen and a black display isprovided on the screen.

[0104] In the single-polarizer twisted nematic mode, the direction oforientation of the liquid crystal molecules is parallel with the majorsurfaces of the substrates, and therefore usual methods of orientatingthe liquid crystal molecules can be employed and its manufacturingprocess is highly stable. The normally white mode operation ispreventive of defective displays occurring at low voltage levels. Thereason is that, in the normally white mode, a dark level (a blackdisplay) is provided when a high voltage is applied across the liquidcrystal layer, and in this state, almost all the liquid crystalmolecules are orientated in the direction of the electric field which isperpendicular to the major surfaces of the substrates, and consequently,a display of the dark level does not depend very much upon the initialconditions of orientation of the liquid crystal molecules having a lowelectric field applied thereto. The human eye perceives non-uniformityin luminance based upon the ratio of luminances, is responsiveapproximately to the logarithm of luminance, and consequently, issensitive to variations in dark levels. Because of the above reasons,the normally white mode has advantages with respect to prevention ofnon-uniformity in luminance caused by initial conditions of orientationof the liquid crystal molecules.

[0105] The electrically controlled birefringence mode requires a highlyprecise cell gap between the substrates of the liquid crystal displaypanel. The electrically controlled birefringence mode utilizes a phasedifference between ordinary rays and extraordinary rays caused whilethey pass through the liquid crystal layer, and therefore the intensityof the light transmission through the liquid crystal layer depends uponthe retardation Δn·d between the ordinary and extraordinary rays, whereΔn is a birefringence and d is a cell gap established by spacers 4between the transparent substrate 2 and the drive circuit substrate 1.

[0106] In this embodiment, in view of non-uniformity in display, thecell gap was controlled with accuracy of ±0.05 μm. In the reflectivetype liquid crystal display panel, light entering the liquid crystallayer is reflected by the reflective electrode, and then passes throughthe liquid crystal layer again, therefore, if the reflective type liquidcrystal display panel uses a liquid crystal composition having the samebirefringence A n as that of a liquid crystal composition used in thetransmissive type liquid crystal display panel, the cell gap d of thereflective type liquid crystal display panel is half that of thetransmissive type liquid crystal display panel. Generally, the cell gapd of the transmissive type liquid crystal display panel is in a range offrom about 5 microns to about 6 microns, but in this embodiment the cellgap d is selected to be about 2 microns.

[0107] In this embodiment, to ensure a high accuracy of the cell gap anda smaller cell gap than that of conventional liquid crystal displaypanels, column-like spacers are fabricated on the drive circuitsubstrate 1 instead of using a conventional bead-dispersing method.

[0108]FIG. 14 is a schematic plan view of a liquid crystal display panelfor explaining an arrangement of the reflective electrodes 5 and thespacers 4 disposed on the drive circuit substrate 1. A large number ofspacers 4 are arranged in a matrix array over the entire area of thedrive circuit substrate 1 for establishing a uniform spacing between thetransparent substrate 2 and the drive circuit substrate 1. Each of thereflective electrodes 5 defines a pixel serving as the smallest pictureelement formed by the liquid crystal display panel. For the sake ofsimplicity, FIG. 14 illustrates an array of five columns by four rows ofpixels, pixels in the outermost columns and rows are represented byreference numeral 5B, pixels within the outermost columns and rows arerepresented by reference numeral 5A.

[0109] In FIG. 14, the array of five columns by four rows of pixelsforms a display area, in which a display by the liquid crystal displaypanel is formed. Dummy pixels 113 are disposed around the display area,a peripheral frame 11 made of the same material as that of the spacers 4is disposed around the dummy pixels 113, and a sealing member 12 iscoated around the peripheral frame 11 on the drive circuit substrate 1.Reference numeral 13 denotes terminals for external connections whichare used for supplying external signals to the liquid crystal displaypanel 100.

[0110] The spacers 4 and the peripheral frame 11 are formed of resinmaterial. As the resin material can be used a chemically amplified typenegative photoresist “BPR-113”(a trade name) manufactured by JSR Corp.(Tokyo, Japan), for example. The photoresist material is coated as by aspin coating method on the drive circuit substrate 1 having thereflective electrodes 5 formed thereon, then is exposed through a maskhaving a pattern in the form of the spacers 4 and the peripheral frame11, and then is developed by a remover to form the spacers 4 and theperipheral frame 11.

[0111] When the spacers 4 and the peripheral frame 11 is fabricated byusing photoresist or the like as their material, the height of thespacers 4 and the peripheral frame 11 can be controlled by coatingthickness of the material, and therefore the spacers 4 and theperipheral frame 11 can be fabricated with high precision. The positionsof the spacers 4 can be determined by the mask pattern, andconsequently, the spacers 4 can be located at the desired positionsaccurately.

[0112] In the liquid crystal display panel employed in a liquid crystalprojector, if one of the spacers 4 is present on a pixel, a problemarises in that a shadow of the spacer 4 is visible in its projectedenlarged image. By fabricating the spacers 4 by exposure through a maskpattern and subsequent development, the spacers 4 can be located at suchpositions as not to deteriorate the quality of a displayed image.

[0113] Since the spacers 4 and the peripheral frame 11 have beenfabricated simultaneously, the liquid crystal composition 3 can besealed between the drive circuit substrate 1 and the transparentsubstrate 2, by initially dropping a small amount of the liquid crystalcomposition 3 on the drive circuit substrate 1, then overlapping thetransparent substrate 2 on the drive circuit substrate 1 with the liquidcrystal layer therebetween, and then bonding the transparent substrate 2to the drive circuit substrate 1.

[0114] When the liquid crystal display panel 100 has been assembledafter interposing the liquid crystal composition 3 between the drivecircuit substrate 1 and the transparent substrate 2, the liquid crystalcomposition 3 is held within a region surrounded by the peripheral frame11.

[0115] The sealing member 12 is coated around the outside of theperipheral frame 11 and confines the liquid crystal composition 3 withinthe liquid crystal display panel 100.

[0116] As described above, the peripheral frame 11 is fabricated byusing the pattern mask, and therefore it is fabricated on the drivingcircuit substrate 1 with high positional accuracy, and consequently, theborder of the liquid crystal composition 3 can be defined with highaccuracy. Further, the peripheral frame 11 can define the border of thesealing member 12 with high accuracy.

[0117] The sealing member 12 serves to fix the drive circuit substrate 1and the transparent substrate 2 together, and also serves to preventmaterials harmful to the liquid crystal composition 3 from penetratingthereinto. When the fluid sealing member 12 is applied, the peripheralframe 11 serves as a stopper against the sealing member 12. By disposingthe peripheral frame 11 as the stopper against the sealing member 12,the borders of the liquid crystal composition 3 and the sealing member12 can be established with high precision, and consequently, the regionbetween the display area and the peripheral sides of the liquid crystaldisplay panel 100 can be reduced, resulting in the reduction of theperipheral border around the display area.

[0118] Dummy pixels 113 are disposed between the peripheral frame 11 andthe display area for making the quality of the display produced by theoutermost pixels 5B equal to that of the display produced by the innerpixels 5A disposed inside the outermost pixels 5B. Since the innerpixels 5A have neighboring pixels, unwanted electric fields aregenerated between the inner pixels 5A and their neighboring pixels, andconsequently, the quality of the display produced by the inner pixels 5Ais made worse compared with that produced in the absence of theirneighboring pixels.

[0119] On the other hand, assume a case where none of the dummy pixels113 are provided, then unwanted electric fields degrading the displayquality are not produced around the outermost pixels 5B, and as a resultthe display quality by the outermost pixels 5B is better compared withthat by the inner pixels 5A. If some pixels have difference in displayquality between them, non-uniformity occurs in display. To eliminatethis problem, the dummy pixels 113 are provided and are supplied withsignal voltages like the pixels 5A and 5B so that the display quality ofthe outermost pixels 5B is equalized with that of the inner pixels 5A.

[0120] Further, since the peripheral frame 11 is fabricated to surroundthe display area, a problem arises in that, in performing a rubbingtreatment on the surface of the drive circuit substrate 1 fororientating the liquid crystal molecules of the liquid crystalcomposition 3 in a specified direction, the peripheral frame 11 impedesthe rubbing treatment of the surface in the vicinity of the peripheralframe 11. In this embodiment, a liquid crystal molecule orientation film7 (see FIG. 7) is coated on the drive circuit substrate 1 after thespacers 4 and the peripheral frame 11 are fabricated on the drivecircuit substrate 1, and then the rubbing treatment is performed byrubbing the liquid crystal molecule orientation film 7 with a cloth orthe like such that the rubbed orientation film 7 orients the liquidcrystal molecules of the liquid crystal composition 3 in a specifieddirection.

[0121] In the rubbing treatment, because the peripheral frame 11 israised above the surface of the drive circuit substrate 1, theorientation film 7 in the vicinity of the peripheral frame 11 is notrubbed sufficiently because of the step formed by the peripheral frame11, and consequently, non-uniformity in orientation of the liquidcrystal molecules is apt to occur in the vicinity of the peripheralframe 11. In order to make inconspicuous non-uniformity in a displaycaused by defective orientation of the liquid crystal molecules of theliquid crystal composition 3, some of the pixels immediately inside theperipheral frame 11 are fabricated as dummy pixels 113 which do notcontribute to a display.

[0122] However, if the dummy pixels 10 are supplied with signals likethe pixels 5A and 5B, a problem arises in that displays produced by thedummy pixels 10 are also observed by the viewer because of presence ofthe liquid crystal composition 3 between the dummy pixels 10 and thetransparent substrate 2. In the liquid crystal display panel of thenormally white type, the dummy pixels 113 appear white when a voltage isnot applied across the layer of the liquid crystal composition 3, andconsequently, the border of the display area becomes ill-defined and thequality of a display is deteriorated. It is conceivable to mask thedummy pixels 113, but it is difficult to fabricate a light-blockingframe at the border of the display area accurately because of a spacingof a few microns between the pixels, and therefore the dummy pixels 113are supplied with such a voltage that the dummy pixels 113 display blackimages which appear as a black peripheral frame surrounding the displayarea.

[0123] Next a method of driving the dummy pixels 113 will be explainedby reference to FIG. 15. The dummy pixels 113 are supplied with avoltage to produce a black display, and therefore the entire area of theregions provided with the dummy pixels 113 appears black. If the dummypixels 113 produces a continuous large-area black display, it is notnecessary to fabricate dummy pixels separate from each other as in thecase of the pixels disposed in the display area, but the plural dummypixels can be fabricated as electrically connected together. When timerequired for driving is considered, it is useless to provide writingtime for the dummy pixels. It is possible to form a single dummy pixelby integrating plural dummy pixels, but the area of the single dummypixel is increased, and as a result its liquid crystal capacitancebecomes too large. As described above, if the liquid crystal capacitancebecomes large, this increase degrades the efficiency of lowing the pixelelectrode potential by using the pixel capacitance.

[0124] In view of the above, in this embodiment, the dummy pixels arealso fabricated separately from each other like the pixels in thedisplay area. However, if writing into the dummy pixels are performedrow by row as in the case of writing into the useful pixels in thedisplay area, this writing increases the length of time required for aplurality of rows of the dummy pixels newly added, and as a result thetime available for writing of the useful pixels in the display area isreduced so much.

[0125] In a high-definition display, high-speed video signals (signalsat high dot-clocks) are entered, time available for writing into pixelsis further restricted. In view of this, to save time for writing into afew rows during a period used for writing one picture, as shown in FIG.15, the bidirectional vertical shift register VSR of the vertical drivecircuit 130 is configured so as to provide a timing signal to aplurality of rows of a series connection of a level shifter 67 and itsoutput circuit 69 in common such that scanning signals are output to theplural dummy pixel rows at a time, and the bidirectional shift registerSR of the pixel-potential control circuit 135 is also configured so asto provide a timing signal to a plurality of rows of a series connectionof a level shifter 67 and its output circuit 69 in common such that thepixel-potential control signals are output to the plural dummy pixelrows at a time.

[0126] The following explains a configuration of the active elements 30and their vicinity fabricated on the drive circuit substrate 1 byreference to FIGS. 16 and 17. The same reference numerals as utilized inFIG. 7 designate corresponding portions in FIGS. 16 and 17. FIG. 17 is aschematic plan view of the active element 30 and its vicinity, and FIG.16 is a cross-sectional view of FIG. 17 taken along line XVI-XVI. Forclarity, distances between components in FIG. 16 are not made equal tocorresponding ones in FIG. 17, and FIG. 17 is intended to illustratepositional relationships among the scanning signal lines 102, the gateelectrode 36, the video signal line 103, the drain region 35, the sourceregion 34, the second electrode 40 for forming the pixel capacitance,the first conductive layer 42, and the contact holes 35CH, 34CH, 40CHand 42CH, with the other components being omitted. In FIG. 16, referencenumeral 1 denotes a silicon substrate serving as the drive circuitsubstrate, 32 is a semiconductor region (a p-type well) fabricated inthe drive circuit substrate 1 by using ion implantation, 33 is a channelstopper, 34 is the drain region fabricated in the p-type well 32 bybeing made electrically conductive by ion implantation, 35 is the sourceregion fabricated in the p-type well 32 by ion implantation, and 31 isthe first electrode of the pixel capacitance fabricated in the p-typewell 32 by being made electrically conductive by ion implantation.Incidentally, the p-channel type transistors are used as the activeelements 30 in this embodiment, but n-channel type transistors can beused instead.

[0127] In FIG. 16, reference numeral 36 denotes the gate electrode, 37is an offset region for relaxing electric fields at the edge of the gateelectrode 36, 38 is an insulating film, 39 is the field oxide film forelectrically insulating the transistors from each other, and 40 is thesecond electrode for forming the pixel capacitance in cooperation withthe first electrode 31 fabricated in the silicon substrate 1 with theinsulating film 38 therebetween. The gate electrode 36 and the secondelectrode 40 are made of a two-layer film formed of a conductive filmfor lowering a threshold voltage of the active element 30 and alow-resistance conductive film disposed on the insulating film 38. Thetwo-layer film can be made of two poly-silicon and tungsten silicidefilms, for example. Reference numeral 41 is the first insulatinginterlayer film, and 42 is the first conductive film. The firstconductive film 42 is a multilayer film made of a barrier metal film forpreventing imperfect contact and a low-resistance conductive film. Forexample, a sputtered multilayer metal film made of titanium tungsten(TiW) and aluminum can be used as the first conductive film.

[0128] In FIG. 17, reference numeral 102 denotes the scanning signalline. The scanning signal lines 102 extend in the X direction in FIG.17, are arranged in the Y direction, and are supplied with scanningsignals for turning the active elements 30 ON and OFF. The scanningsignal lines 51 are formed of the same two-layer film as the gateelectrodes 36. The two-layer film made of laminated poly-silicon andtungsten silicide films, for example, can be used as the scanning signallines 102. The video signal lines 103 extend in the Y direction, arearranged in the X direction, and are supplied with video signals to bewritten into the reflective electrodes 5. The video signal lines 103 areformed of the same multilayer metal film as the first conductive films42. The multilayer metal film made of titanium tungsten (TiW) andaluminum, for example, can be used as the video signal lines 103.

[0129] The video signals are supplied to the drain region 35 by thefirst conductive film 42 through the contact hole 35CH made in theinsulating film 38 and the first insulating interlayer film 41. When ascanning signal is supplied to the scanning signal line 102, the activeelement 30 is turned ON, and the video signal is transmitted from thesemiconductor region (the p-type well) 32 to the source region 34, andthen is transmitted to the first conductive film 42 through the contacthole 34CH. Thereafter the video signal is transmitted from the firstconductive film 42 to the second electrode 40 of the pixel capacitancethrough the contact hole 40CH, and then is transmitted to the reflectiveelectrode 5 through the contact hole 42CH as shown in FIG. 16. Thecontact hole 42CH is positioned over the field oxide film 39. The topsurface of the field oxide film 39 is situated at a higher level thanother elements because of the large thickness of the field oxide film39. By placing the contact hole 42CH over the field oxide film 39, thecontact hole 42CH can be located nearer to the upper conductive layer,and thereby the length of electrical connection at the contact hole 42CHcan be shortened.

[0130] The second insulating interlayer film 43 insulates the secondconductive film 44 from the first conductive film 42. The secondinsulating interlayer film 43 is formed of two layers composed of aplanarizing film 43A for filling indentations and reducing unevennesscaused by underlying elements and an insulating film 43B overlying theplanarizing film 43A. The planarizing film 43A is fabricated by applyingSOG (Spin-On-Glass), and the insulating film 43B is an SiO₂ filmfabricated by a CVD process using TEOS (Tetraethylorthosilicate) asreactive gas. The second insulating interlayer film 43 is planarized bypolishing it using the CMP (Chemical Mechanical Polishing) process afterit is applied on the silicon substrate 1. The first light-blocking film44 is fabricated on the planarized second insulating interlayer film.The first light-blocking film 44 is formed of the same multilayer metalfilm made of titanium tungsten (TiW) and aluminum as the firstconductive film 42.

[0131] The first light-blocking film 44 covers the approximately entirearea of the drive circuit substrate 1, and openings are made only at thecontact holes 42CH shown in FIG. 16. The third insulating interlayerfilm 45 is fabricated on the first light-blocking film 44, by the CVDprocess using TEOS (Tetraethylorthosilicate) as reactive gas. Further,the second light-blocking film 46 is formed on the third insulatinginterlayer film 45, and is formed of the same multilayer metal film madeof titanium tungsten (TiW) and aluminum as the first conductive film 42.The second light-blocking film 46 is connected to the first conductivefilm 42 via the contact hole 42CH. In the contact hole 42CH, the metalfilm forming the first light-blocking film 44 and the metal film formingthe second light-blocking film 46 are laminated for electricalconnection.

[0132] When the first light-blocking film 44 and the secondlight-blocking film 46 are made of conductive films, the thirdinterlayer film 45 made of an insulating (dielectric) film is interposedtherebetween, the pixel-potential control signal is applied to the firstlight-blocking film 44, and a gray scale voltage is applied to thesecond light-blocking film 46, a pixel capacitance can be formed betweenthe first light-blocking film 44 and the second light-blocking film 46.

[0133] In view of the withstand voltage of the third insulatinginterlayer film 45 with respect to gray scale voltage and increasing ofthe capacitance by reducing the thickness of the dielectric film 45, itis desired that the thickness of the third insulating interlayer film 45is in a range of from 150 nm to 450 nm, and is preferably about 300 nm.

[0134]FIG. 18 is a perspective view of the drive circuit substrate 1superposed with the transparent substrate 2. Formed at the periphery ofthe drive circuit substrate 1 is the peripheral frame 11, and the liquidcrystal composition 3 is confined in a space surrounded by theperipheral frame 11, the drive circuit substrate 1 and the transparentsubstrate 2. The sealing member 12 is coated around the outside of theperipheral frame 11 between the superposed drive circuit substrate 1 andtransparent substrate 2. The drive circuit substrate 1 and thetransparent substrate 2 are fixed together by the sealing member 12 toform the liquid crystal display panel 100. Reference numeral 13 denoteterminals for external connection.

[0135] Next, as shown in FIG. 19, a flexible printed wiring board 80 forsupplying external signals to the liquid crystal display panel 100 isconnected to terminals 13 for external connections. Two outermostterminals on opposite sides of one end of the flexible printed wiringboard 80 are made longer than the remainder of terminals, are connectedto the counter electrode 5 formed on the transparent substrate 2, andthereby serve as counter-electrode terminals 81. In this way, theflexible printed wiring board 80 is connected to both of the drivecircuit substrate 1 and the transparent substrate 2.

[0136] Conventionally, a flexible printed wiring board is connected toterminals for external connections disposed on the drive circuitsubstrate 1 only, and therefore the wiring to the counter electrode 5from the flexible printed wiring board is made via the drive circuitsubstrate 1. The transparent substrate 2 in this embodiment of thepresent invention is provided with connecting portions 82 to beconnected to the flexible printed wiring board 80 such that the flexibleprinted wiring board 80 is connected directly to the counter electrode5. The liquid crystal display panel 100 is formed by superposing thetransparent substrate 2 on the drive circuit substrate 1. Thetransparent substrate 2 is superposed on the drive circuit substrate 1such that a peripheral portion of the transparent substrate 2 extendsbeyond the outside edges of the drive circuit substrate 1 and providesthe connecting portions 82 where the flexible printed wiring board 80 isconnected to the counter electrode 5.

[0137]FIGS. 20 and 21 illustrate a configuration of the liquid crystaldisplay device 200. FIG. 20 is an exploded view in perspective of themajor elements of the liquid crystal display device 200, and FIG. 21 isa plan view of the liquid crystal display device 200.

[0138] As shown in FIG. 20, the liquid crystal display panel 100 havingthe flexible printed wiring board 80 connected thereto is disposed onthe heat-radiating plate 72 with a cushion member 71 interposedtherebetween. The cushion member 71 is highly heat-conductive, and fillsa gap between the heat-radiating plate 72 and the liquid crystal displaypanel 100 for heat from the liquid crystal display panel 100 to conductto the heat-radiating plate 72 easily. Reference numeral 73 denotes amold, which is fixed to the heat-radiating plate 72 with an adhesive.

[0139] As shown in FIG. 21, the flexible printed wiring board 80 ispassed between the mold 73 and the heat-radiating plate 72, and then isbrought out of the mold 73. Reference numeral 75 denotes alight-blocking plate which prevents light from a light source fromentering the unintended portions of the liquid crystal display device200, and 76 is a light-blocking frame which defines the display area ofthe liquid crystal display device 200.

[0140] The invention by the present inventors has been explainedconcretely based upon the embodiments in accordance with the presentinvention, but the present invention is not limited to theabove-described embodiments, and various changes and modifications canbe made without departing from the spirit and scope of the presentinvention.

[0141] The advantages obtained by the representative ones of theinventions disclosed in this specification can be summarized as follows:

[0142] The present invention makes it possible to form drive circuits byusing low-voltage circuits when the drive circuits are incorporated intoa liquid crystal display element, and is capable of reducing an areaoccupied by the drive circuits and an area occupied by each pixel,thereby making possible high-speed operation of the circuits. Further,the present invention is capable of realizing a small-sizedhigh-definition liquid crystal display element.

What is claimed is:
 1. A liquid crystal display device comprising afirst substrate, a second substrate, a liquid crystal compositionsandwiched between said first substrate and said second substrate, aplurality of pixels disposed on said first substrate, each of saidplurality of pixels being supplied with a video signal via a switchingelement connected to a first electrode thereof, each of said pluralityof pixels being provided with a capacitance, one of twocapacitance-forming electrodes forming said capacitance being connectedto said first electrode of a corresponding one of said plurality ofpixels, and another of said two capacitance-forming electrodes beingsupplied with a pixel-potential control signal, wherein polarity of saidvideo signal reverses with respect to a first reference voltage with arepetition period, and said pixel-potential control signal alternatesbetween two voltage levels of same polarity with respect to a secondreference voltage such that a voltage swing on said first electrodes ofsaid plurality of pixels becomes larger than that of said video signal.2. A liquid crystal display device according to claim 1, wherein saidfirst substrate is made of silicon.
 3. A liquid crystal display devicecomprising a first substrate, a second substrate, a liquid crystalcomposition sandwiched between said first substrate and said secondsubstrate, a plurality of pixels disposed on said first substrate, eachof said plurality of pixels being supplied with a video signal via aswitching element connected to a first electrode thereof, each of saidplurality of pixels being provided with a capacitance, one of twocapacitance-forming electrodes forming said capacitance being connectedto said first electrode of a corresponding one of said plurality ofpixels, another of said two capacitance-forming electrodes beingsupplied with a pixel-potential control signal, and light-blocking filmsinterposed between electrodes forming said plurality of pixels on saidfirst substrate, wherein polarity of said video signal reverses withrespect to a first reference voltage with a repetition period, saidpixel-potential control signal alternates between two voltage levels ofsame polarity with respect to a second reference voltage such that avoltage swing on said first electrodes of said plurality of pixelsbecomes larger than that of said video signal, and said pixel-potentialcontrol signal is provided via a corresponding one of saidlight-blocking films.
 4. A liquid crystal display device according toclaim 2, wherein said first substrate is made of silicon.
 5. A liquidcrystal display device comprising a first substrate, a second substrate,a liquid crystal composition sandwiched between said first substrate andsaid second substrate, a plurality of pixels disposed on said firstsubstrate, each of said plurality of pixels being supplied with a videosignal via a switching element connected to a pixel electrode thereof,each of said plurality of pixels having a pixel capacitance and a liquidcrystal capacitance, one of two pixel-capacitance-forming electrodesforming said pixel capacitance being connected to said pixel electrodeof a corresponding one of said plurality of pixels, another of said twopixel-capacitance-forming electrodes being supplied with apixel-potential control signal, one of twoliquid-crystal-capacitance-forming electrodes forming said liquidcrystal capacitance being said pixel electrode of said corresponding oneof said plurality of pixels, and another of said twoliquid-crystal-capacitance-forming electrodes being supplied with afirst reference voltage, wherein said video signal swings between twovoltage levels of same polarity with respect to a second referencevoltage, and said pixel-potential control signal changes from a firstvoltage level to a second voltage level such that a voltage on saidpixel electrode is reversed in polarity with respect to said firstreference voltage.
 6. A liquid crystal display device according to claim5, wherein said first substrate is made of silicon.